Differential Amplifier Circuit
Without further ado, let's dive straight into it. Figure 1 illustrates the fundamental structure of a differential amplification circuit, comprising an operational amplifier and four peripheral matching resistors. This setup is commonly employed for current sensing or amplification of differential signals. However, differential amplifiers inherently come with several drawbacks. Without understanding these drawbacks, our circuit designs may be adversely affected. How many of these drawbacks do you know?
Figure 1: Differential Amplification Circuit
Drawback of Differential Amplifier: Low Input Impedance
The input impedance of a differential amplifier is very low, which is related to its matching resistors. Moreover, the input impedances of the two input terminals of the differential amplifier are not symmetrical. How do we calculate the input impedance of the two input terminals?
In Figure 1, when calculating the input impedance of Vi-, we only consider Vi- and ignore Vi+, as shown in the left diagram of Figure 2. At this point, the circuit forms an inverting amplifier structure, the input impedance of an inverting amplifier circuit is approximately equal to the input resistor R1.
Figure 2: Calculation of Input Impedance for Differential Amplification
When calculating the input impedance of Vi+, we only consider Vi+ and ignore Vi-, as shown in the right diagram of Figure 2. At this point, the circuit resembles a non-inverting amplifier structure. Vi+ is attenuated by R1 and R2 before being amplified in phase. Vi+ passes through R1 and R2 to ground. Therefore, the input impedance of Vi+ is approximately the value of the resistor (R1+R2).
Let's conduct a simulation of the input impedance. As shown in Figure 3, the input impedance of Vi- is 1 kΩ, while the input impedance of Vi+ is 11 kΩ.
Figure 3: Simulation of Input Impedance for Differential Amplification
Differential amplifiers not only have low input impedance, but also the input impedances of the two input terminals are not symmetrical. If the source impedance of the signal source connected to the differential amplifier's two pins does not match, it will also reduce CMRR. This is the second drawback of differential amplification circuits: low Common-Mode Rejection Ratio (CMRR).
Drawback of Differential Amplifier: Low Common-Mode Rejection Ratio (CMRR)
The ideal state for a differential amplifier is when the two resistors R1 and R2 in the circuit of Figure 1 are perfectly matched. However, it's practically impossible to find resistors with exactly identical values; even common resistors have a tolerance of around 1%. This mismatch in resistors significantly reduces the Common-Mode Rejection Ratio (CMRR) of the amplifier.
In Figure 4, let's briefly examine the CMRR of the differential amplifier. In the simulation on the left side, where the resistors are perfectly matched, and the common-mode signal input is 0.1V at 50Hz, the output is 10uV. This means that the 0.1V common-mode input signal is converted to a 10uV output signal (assuming the CMRR of the virtual operational amplifier model is 100dB). In other words, even in the scenario where the external resistors are perfectly matched, the CMRR of the differential amplifier is not infinite; it is limited by the operational amplifier.
Figure 4: Differential Amplifier CMRR and Resistor Mismatch
In the right diagram of Figure 4, we have changed one of the resistors from 1 kΩ to 1.01 kΩ, representing the maximum tolerance of 1%. In this scenario, with the same common-mode input, the output becomes approximately 1000uV, which is 100 times greater than the 10uV output in the left diagram. This illustrates how resistor mismatch reduces the CMRR, significantly diminishing the amplifier's ability to suppress common-mode interference.
Is it possible to increase the input impedance and CMRR of a differential amplifier? This question led to the development of the classic three-op-amp instrumentation amplifier.
