The fastest way to actually learn FPGA design is to build a short sequence of small, focused projects in order, each one adding exactly one new concept on top of what the last one taught: a single flip-flop, then combinational arithmetic, then a physical display, then a combined project, rather than jumping straight to an ambitious build that requires all of those concepts at once before anything works. This guide lays out that five-step sequence, what to build at each stage, in what order, and why each step is a direct prerequisite for the one after it, not just a related topic.
Quick reference, the build order:
| Step | Project | New concept | Guide |
|---|---|---|---|
| 1 | D flip-flop | Sequential logic, edge-triggered storage | D, T, JK Flip-Flops and SR Latches |
| 2 | Language choice | Verilog syntax fundamentals | Verilog or VHDL |
| 3 | Full adder | Combinational logic, arithmetic circuits | Building a Full Adder in Verilog |
| 4 | Seven segment display | Driving physical output, multiplexing | Seven Segment Displays |
| 5 | Counter with display | Combining sequential and combinational | Covered below |
What Most Beginners Get Wrong
Most beginners starting FPGA design pick a project first, a digital clock, a simple game, a sensor readout, and only discover partway through that they are missing two or three prerequisite concepts they have to backfill under pressure. The fix is not a different first project. It is choosing a sequence where each build only ever introduces one new idea, so that when something does not work, there is exactly one likely cause, not five tangled possibilities. That is the actual reason this guide exists as an ordered sequence rather than a list of unrelated project ideas.
Step 1: Learn What a Flip-Flop Actually Stores
Every piece of FPGA design that remembers anything, a counter, a state machine, a register, a display buffer, is built from flip-flops. Starting anywhere else means using memory elements you do not yet understand as a black box. The D, T, JK Flip-Flops and SR Latches guide covers the SR latch, D latch, and D, T, and JK flip-flops, including working Verilog for each and how to test one on real hardware with a debounced switch input. This is the single most important prerequisite in this entire sequence: sequential logic, the idea that a circuit’s output depends on stored state and not just current inputs, underpins everything that follows.
Step 2: Settle on Verilog Before Writing More Code
Before building anything past the first flip-flop, decide which hardware description language you are committing to, because switching languages mid-project costs real time. Verilog or VHDL: Which Language to Learn First makes the direct case for Verilog as the practical starting point for most beginners with no existing constraint pulling them toward VHDL, and shows the same D flip-flop written in both languages side by side so the difference is concrete rather than abstract. Every example later in this sequence, and every example in this guide overall, is written in Verilog for that reason.
Step 3: Build Combinational Logic With a Full Adder
A flip-flop is sequential: it remembers. The next concept is combinational: logic with no memory, where outputs depend only on current inputs. Building a Full Adder in Verilog is the right second circuit because it is the smallest combinational circuit that is still genuinely useful, the arithmetic building block behind every counter and ALU on an FPGA. It also directly contrasts with Step 1: a full adder chained into a ripple carry adder is correct combinational design, which the guide explicitly distinguishes from the ripple counter mistake that Step 1 warns against, two circuits that share a name but nothing else. Working through both back to back is what makes the sequential-versus-combinational distinction click instead of staying a definition you memorized.
Step 4: Drive a Physical Output
The first three steps all end at LEDs or a simulator waveform. Seven Segment Displays: Pinout, Wiring, and Driving One From an FPGA is the first step in this sequence that drives a genuinely legible physical output: a real digit, not just a lit or unlit LED. It also introduces a new practical skill neither earlier project needs, confirming common cathode versus common anode wiring, and for multi-digit builds, multiplexing, cycling through digits fast enough that persistence of vision reads it as continuous. This is also the step where getting the wiring wrong produces the most immediately visible feedback, a scrambled or dim digit, which makes debugging tangible in a way a wrong LED state does not.
Step 5: Combine Both Halves in a Counter With a Display
With flip-flops, combinational logic, and a display driver each understood individually, the natural next build is a circuit that needs all three at once: a counter that increments on a clock and shows its current value on a seven segment display. This is not a new concept so much as the first project where the sequential and combinational halves of this guide work together in a single design, exactly as flagged in both the flip-flop guide and the full adder guide.
The shape of this circuit is straightforward once the pieces are in place. The FPGA’s system clock runs far too fast to watch a counter increment by eye, so the design needs a way to mark time in human-readable intervals without literally routing a slowed-down signal into other logic’s clock input, which invites the timing problems this guide’s flip-flop article warns against. The standard approach is a counting register (flip-flops, per Step 1) that counts system clock cycles and produces a single-cycle enable pulse once it reaches a target count, roughly once per second for a human-readable display. That enable pulse, not a divided clock, is what tells the visible counting register to increment on each interval. The seven segment decoder from Step 4 takes that counter’s current value and converts it to a segment pattern. For a multi-digit counter, add the multiplexing logic from Step 4 to drive more than one digit. Every block in that description is something covered, individually, in one of the four guides above; this project is where they are wired together rather than a new circuit to learn from scratch.
Why This Order and Not a Different One
Each step in this sequence is a direct prerequisite for the one after it, not just a related topic. Step 5 needs flip-flops from Step 1 for its counter, needs a settled language from Step 2 to build it in, needs the combinational thinking from Step 3 to reason about the display decoder correctly, and needs the display driver itself from Step 4. Reordering this sequence, or skipping a step, means hitting one of those dependencies unprepared partway through a more complex build, which is a slower and more frustrating way to learn the same material.
Where to Get the Hardware
Every project in this sequence is designed to run on real FPGA hardware, not simulation alone, because simulation confirms your logic is correct while hardware confirms your understanding of timing, debouncing, and physical I/O actually holds up. The FPGA Learning Kit is built around exactly this five-step progression, from your first flip-flop through the combined counter-and-display project, on an EIM STEPFPGA board.
Frequently Asked Questions
What is the best first FPGA project for a complete beginner?
A single D flip-flop, tested with a debounced switch and an LED. It is small enough to fully understand in one sitting and teaches the single most important prerequisite concept, sequential logic, that every later project depends on.
Do I need to learn Verilog before starting FPGA projects?
Yes, or VHDL, since FPGAs are programmed in a hardware description language rather than a general-purpose programming language. For most beginners with no existing constraint pointing toward VHDL, Verilog is the more practical starting choice; committing to one language before your second project avoids relearning syntax partway through this sequence.
What is the difference between combinational and sequential FPGA projects?
A combinational project, like a full adder, has outputs that depend only on current inputs, with no memory. A sequential project, like a flip-flop or a counter, has outputs that depend on both current inputs and stored state from previous clock cycles. Beginners generally benefit from learning one fully understood example of each before combining them.
How long does it take to go through this beginner FPGA project sequence?
This depends heavily on prior programming and electronics experience and how much time you can dedicate per week; there is no single accurate figure that applies to every beginner. Budget more time for Steps 1 and 3, where the core concepts (sequential and combinational logic) are introduced, and expect Steps 2 and 4 to move faster once those concepts are in place.
Can I skip straight to building a counter with a display?
You can, but debugging it will be harder, because a counter-with-display project depends on flip-flop, combinational, and display-driving concepts all at once. If something does not work, you will be troubleshooting three unfamiliar concepts simultaneously instead of one. Working through Steps 1 through 4 individually first makes Step 5 mostly a wiring exercise rather than a debugging one.
EIM TECHNOLOGY
Founder & Engineering Education Innovator
Daniel Cao is the Founder of EIM Technology and holds a Master of Applied Science in Engineering. With experience in engineering research, product development, PCB design, and technical education, he is the author of several books on electronics engineering. His work focuses on developing practical learning systems that integrate engineering hardware, lab instruments, curriculum, and project-based learning. Through EIM Technology, Daniel aims to make electronics and computer engineering more accessible and engaging, helping students build real experience in designing, measuring, testing, and troubleshooting electronic systems.
